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INFORMS Dallas 1997 Cluster: OR Applications in Semiconductor Manufacturing


Performance Analysis of Semiconductor Manufacturing Systems
Session: SD09
Date/Time: Sunday 14:45-16:15
Type: Invited
Sponsor:
Track:
Cluster: OR Applications in Semiconductor Manufacturing
Room: Regency C
Chair: Phuoc Tran-Gia
Chair Address: Univ. of Wuerzburg, Inst. of Computer Science, Am Hubland, Wuerzburg, 97074 , Germany
Chair E-mail:

SD09.1 On Cycle Times & Interdeparture Times in Semiconductor Manufacturing Manfred Mittler, Notker Gerlich, Alexander K. Schoemig, Oliver Rose --- IBM Germany, Sckickardstr.30, Boeblingen, 71034 , Germany (mittler@vnet.ibm.com)
We investigate the distributions of cycle times and interdeparture¨ times in 2 semiconductor manufacturing systems. The results were¨ obtained by means of simulation. The findings show the normal¨ distribution is, in these cases, a very good approximation of the¨ cycle time distribution. Furthermore, we show that the distribution¨ of interdeparture times can sometimes be approximated by the¨ exponential distribution.

SD09.2 Managing & Measuring the Performance of Inventory in Semiconductor Manufacturing Gerry Feigin --- IBM Corp., TJ Watson Res. Ctr., PO Box 218, Yorktown Heights, NY 10598 ,
A number of factors make effective management of inventory (both WIP¨ and finished goods) especially challenging in semiconductor¨ manufacturing. These include long cycle times, high risk of¨ obsolescence, short product lifetimes, large product variety and¨ volatile demand. We discuss why standard inventory management and¨ measurement techniques are not sufficient in this environment and¨ present directions for research in this area.

SD09.3 Toward Understanding the Capacity of Wafer Fabs & Other Reentrant Manufacturing Systems Jim Dai, John J. Hasenbein, John Vande Vate --- GA Inst. of Tech., Sch. of ISyE, Atlanta, GA 30332-0205,
The extreme complexity of semiconductor manufacturing operations¨ arises in large part from the complex reentrant nature of material¨ flows. It is common that machine utilizations or wafer outs fall¨ below planned levels, while WIP piles up at nonbottleneck processes¨ and bottleneck processes sit idle. We study the queueing network¨ model and the fluid model of the semiconductor system. We show that¨ 'virtual bottlenecks' can constrain the throughputs of these¨ systems...

SD09.4 Discrete-Time Analysis of Batch Servers with Two Job Classes Alexander K. Schoemig --- Univ. of Wuerzburg, SIEMENS AG, Bereich Halbleiter HL MS PR, Wuerzburg, 97074 , Germany
Production processes where several jobs are loaded into a single¨ machine and processed simultaneously are common in semiconductor¨ manufacturing. These machines are called batch servers. We extend¨ previous studies of batch servers considering 2 job classes. For¨ solving optimization problems the discrete-time analysis technique¨ is used. The intent of this paper is to demonstrate the feasibility¨ of discrete-time analysis technique for OR in manufacturing.


Modeling of Semiconductor Manufacturing at Texas Instruments
Session: SE09
Date/Time: Sunday 16:30-18:00
Type: Invited
Sponsor:
Track:
Cluster: OR Applications in Semiconductor Manufacturing
Room: Regency C
Chair: Darius Rohan
Chair Address: Texas Instruments, Inc., 13353 Floyd Rd., Dallas, TX 75248 ,
Chair E-mail:

SE09.1 An Overview of Modeling of Semiconductor Manufacturing at Texas Instruments Darius Rohan --- Texas Instruments, Inc., 13353 Floyd Rd., Dallas, TX 75248 , (darius@dragon.mtc.ti.com)
This presentation provides a brief overview of the various modeling¨ activities at Texas Instruments.

SE09.2 Methodology of Determining Optimal Cluster Equipment Configuration Jani D. Jasadiredja --- Texas Instruments, Inc., 13353 Floyd Rd., Dallas, TX 75248 ,
In the semiconductor wafer fabrication process, clustering has¨ become 1 of the most popular ways of integrating different processes¨ in the same equipment. In a cluster equipment, several process¨ chambers of the same or different process capability are integrated¨ into 1 equipment. Consequently, the analysis of this type of¨ manufacturing system may not be as straight forward and intuitive¨ anymore. This paper demonstrates the application of simulation to¨ determine the optimal multichamber cluster equipment...

SE09.3 Selecting Product Portfolios: A Problem Formulation for the SC Industry Lori Jones --- Texas Instruments, Inc., 13353 Floyd Rd., Dallas, TX 75248 ,
The semiconductor market is a rapidly changing, highly competitive¨ environment. Managing product portfolio is essential to the success¨ of semiconductor companies. This presentation is a survey of¨ optimization techniques applied towards portfolio selection and¨ management. Research was conducted both within and outside the¨ semiconductor market. Lastly, a sample problem formulation which¨ comprehends market demand, available capacity, price elasticity,¨ etc., is presented.

SE09.4 World Wide Equipment Productivity Teaming at Texas Instruments Bob Schlueter, Mark Gorman --- Texas Instruments, Inc., 13353 Floyd Rd., Dallas, TX 75248 ,
We outline the process for equipment productivity teaming across¨ multiple sites at Texas Instruments. We discuss the benefits gained¨ and potential pitfalls from world wide teams addressing specific¨ equipment sets.


Modeling & Analysis of Semiconductor Manufacturing I
Session: MA09
Date/Time: Monday 08:00-09:30
Type: Invited
Sponsor:
Track:
Cluster: OR Applications in Semiconductor Manufacturing
Room: Regency C
Chair: Sean McNunn
Chair Address: Dallas Semiconductor, 4401 S Beltwood Parkway, Dallas, TX ,
Chair E-mail:

MA09.1 Semiconductor Metric Goals & Fab Improvements: The Danger of Inappropriate Measurement Tools Linda Sattler --- Texas Instruments, 4505 Normandy #3, Dallas, TX 75205 ,
When employees are measured and rewarded on certain goals, an¨ inappropriate measurement tool can cause demotivation and costly¨ compromises. This talk outlines some of the current problems with¨ the standard metrics used in semiconductor fabs (throughput, yield,¨ etc.) and describes a queueing curve approach that is being used at¨ Texas Instruments for more appropriate goal setting.

MA09.2 Ready-To-Go Scheduling Luca Sissa --- Texas Instruments, Inc., 13353 Floyd Rd., Dallas, TX 75248 , (l-sissa@ti.com)
We discuss ready-to-go scheduling, the shopfloor execution¨ capability embedded in the state-of-the-art CIM system under¨ development at TI. This methodology, utilizing critical path method,¨ look-ahead-strategies and hierarchical priority rules is aimed to¨ implement JIT execution and synchronized binding of resources to¨ reduce cycle time and improve resource utilization.

MA09.3 Comparison of Static & Dynamic Modeling of Semiconductor Manufacturing Duy Nguyen, Derek Rutherford --- Dallas Semiconductor, 4401 S Beltwood Parkway, Dallas, TX , (duy.nguyen@misnts1.dalsemi.com)
Capacity modeling is done typically in semiconductor manufacturing 1¨ of 2 ways. The 1st is using a static model such as a spreadsheet.¨ Second is a dynamic model such as simulation. A comparison of these¨ 2 modeling techniques shows how they complement and contrast each¨ other.

MA09.4 Using a Relational Database to Integrate Simulation Data Adam Warner --- Dallas Semiconductor, Inc., 4401 S Beltwood Parkway, Dallas, TX , (adam.warner@dalsemi.com)
Generally, the most difficult task in developing an ongoing¨ simulation model of a complex manufacturing environment is¨ collecting and refreshing the data. A relational database can be¨ used to automate the gap between the manufacturing data sources and¨ the input files needed for the simulation model, greatly easing¨ model maintainability.


Modeling & Analysis of Semiconductor Manufacturing II
Session: MC09
Date/Time: Monday 13:00-14:30
Type: Invited
Sponsor:
Track:
Cluster: OR Applications in Semiconductor Manufacturing
Room: Regency C
Chair: John W. Fowler
Chair Address: AZ State Univ., Dept. of IMSE, Tempe, AZ 85287-5906,
Chair E-mail:

MC09.1 Matching Factory Lots to Customer Orders Kraig Knutson, Karl Kempf, John W. Fowler --- AZ State Univ., Dept. of IMSE, Tempe, AZ 85287-5906, (kraig.knutson@asu.edu)
Present methods of matching factory lots to customer orders result¨ in inefficient factory loading, increased cycle time and in excess¨ finished goods inventory. Using simulation and design of experiments¨ methods, we study how various sizes of lots and orders and matching¨ policies affect plant profitability. Plant profitability is measured¨ in excess finished goods inventory and on-time delivery of orders.

MC09.2 Simulation Evaluation of Reticle Management in Photolithography Matt Hickie, John W. Fowler --- Motorola - MOS 12, 1300 N Alma School Rd., Chandler, AZ 85224 , (matt_hickie@chdqm2.sps.mot.com)
Photolithography performance is not only dependent upon the stepper¨ being available, but also upon the availability of reticles. We¨ present the strategic, tactical and operational aspects of reticle¨ management. Strategically, decisions must be made to purchase extra¨ reticles. Tactically, reticle storage and dispersion among the¨ equipment is analyzed. Operationally, what material to run on which¨ piece of equipment is considered.

MC09.3 Test Wafer Opportunities for Cost Reduction Doron Meyersdorf, Ertunga C. Ozelkan --- TEFEN USA, 1065 E Hillsdale Blvd., Ste. 400, Foster City, CA 94404-1615, (doron@tefen.com)
After defining the problems associated with TWs and TW management, a¨ LP-based TW-controller is developed to obtain optimal TW decision¨ policies. The model provides management with vital information on¨ how many TWs to be purchased, downgraded, repolished, reused and/or¨ reworked at each level of semiconductor production process in each¨ time period.


SRC/NSF Initiative: Operational Methods in Semiconductor Manufacturing
Session: MD09
Date/Time: Monday 14:45-16:15
Type: Invited
Sponsor:
Track:
Cluster: OR Applications in Semiconductor Manufacturing
Room: Regency C
Chair: Ronald S. Gyurcsik
Chair Address: Semiconductor Research Corp., 1101 Slater Rd., Brighton Hall, Ste. 120, Research Triangle Pk, NC 27703 ,
Chair E-mail:

MD09.1 SRC/NSF Initiative: Operational Methods in Semiconductor Manufacturing Ronald S. Gyurcsik --- Semiconductor Research Corp., 1101 Slater Rd., Brighton Hall, Ste. 120, Research Triangle Pk, NC 27703 , (rsg@src.org)
The Divisions of Design, Manufacture and Industrial Innovation and¨ Electrical and Communications Systems of the National Science¨ Foundation and the Factory Sciences Program of the Semiconductor¨ Research Corporation plan jointly to support research activities¨ directed at the development of innovative new operational methods¨ that will enable factory performance to keep pace with ongoing¨ improvements in equipment and processes. The major theme of this¨ initiative is the development of modeling, analysis and optimization¨ techniques based on fundamental principles leading to factory-level¨ models that allow for effective control of semiconductor¨ manufacturing operations...


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